| 摘要 |
PROBLEM TO BE SOLVED: To provide a Chien search circuit that is reduced in circuit scale while keeping decoding process speed intact.SOLUTION: The Chien search circuit includes first and second operation sections, and an addition section for adding up an addition result of the first operation section and an addition result of the second operation section. An i-th computing element of the first operation section and the second operation section includes a register, and a first multiplier for inputting a result of multiplying input data by α, as an operation result, into an adder and updating the content of the register. Each computing element of the second operation section includes an initial value calculation circuit for calculating an initial value for computing a different search area from the first operation section, a first selector for selecting either a coefficient or the initial value to be input into the register in accordance with number of error bits of an error position polynomial operation, a second multiplier for multiplying input data from the register by α, and a second selector inputting by selecting either one of the content of the register and an operation result of the second multiplier to the first multiplier. |
