| 摘要 |
PROBLEM TO BE SOLVED: To perform timing control of a signal during high-speed data transfer with more accuracy.SOLUTION: A semiconductor storage device 1 includes: a plurality of first output circuits 20 that respond to both of a riding edge and a trailing edge of a clock and each output a plurality of data signals DQ to the outside, and includes a plurality of first output pads 24; a second output circuit 21 that outputs a data strobe signal DQS in synchronization with the plurality of data signals DQ and includes a plurality of second output pads 25; a power source pad 22-1 that receives electric power for the plurality of first output circuits 20 from the outside; and a power source pad 22-2 that receives electric power for the second output circuit 21 from the outside. The second output circuit 21 includes a delay element 50 that adjusts timing of the data strobe signal DQS. |
