发明名称 RACE FREE INTERRUPT
摘要 A computer device includes a processor, a circuit block capable of issuing an interrupt to the processor, and a cacheable memory configured to include a register that is mapped to the logic block for storing interrupt status information of the logic block.
申请公布号 US2013262727(A1) 申请公布日期 2013.10.03
申请号 US201213436548 申请日期 2012.03.30
申请人 CHITLUR NAGABHUSHAN;INTEL CORPORATION 发明人 CHITLUR NAGABHUSHAN
分类号 G06F13/24 主分类号 G06F13/24
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