发明名称 ROM Arrays Having Memory Cell Transistors Programmed Using Metal Gates
摘要 According to one exemplary implementation, an integrated circuit (IC) includes a first memory cell transistor of a read only memory (ROM) array, the first memory cell transistor including a first metal gate of a first work function and having a first threshold voltage. The IC also includes a second memory cell transistor of the ROM array, the second memory cell transistor including a second metal gate of a second work function and having a second threshold voltage. The first memory cell transistor and the second memory cell transistor can be of a first conductivity type. Furthermore, the first memory cell transistor can include a first high-k gate dielectric and the second memory cell transistor can include a second high-k gate dielectric.
申请公布号 US2013256804(A1) 申请公布日期 2013.10.03
申请号 US201213436621 申请日期 2012.03.30
申请人 XIA WEI;BROADCOM CORPORATION 发明人 XIA WEI
分类号 H01L27/112;H01L21/28 主分类号 H01L27/112
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