Receiver and semiconductor integrated circuit having the same

摘要

A receiver includes a positive pulse determination circuit and a negative pulse determination circuit. The positive pulse determination circuit outputs a first L-level determination result during a period between the instant at which a pulse signal having a negative amplitude is detected and the instant at which neither a pulse signal having a positive amplitude nor a pulse signal having a negative amplitude is detected, and outputs a first H-level determination result if a pulse signal having a positive amplitude is detected during the other period. The negative pulse determination circuit outputs a second L-level determination result during a period between the instant at which a pulse signal having a positive amplitude is detected and the instant at which neither a pulse signal having a positive amplitude nor a pulse signal having a negative amplitude is detected, and outputs a second H-level determination result if a pulse signal having a negative amplitude is detected during the other period.