发明名称 Driver circuit and semiconductor device
摘要 A PMOS output stage (20P) and an NMOS output stage (20N) of which output impedances are controlled in accordance with impedance codes (60), a gate control part (32P) which drives output transistors held by the PMOS output stage and the NMOS output stage, and a slew rate control part (40) which generates bias voltages (42) to control driving ability of the gate control part based on an input current are included, and manufacturing variability of an input current circuit (41) generating an input current is corrected by using the impedance code (60) by the slew rate control part (40).
申请公布号 EP2645573(A2) 申请公布日期 2013.10.02
申请号 EP20120197748 申请日期 2012.12.18
申请人 FUJITSU LIMITED 发明人 KANAYAMA, YASUTAKA;TOKUHIRO, NORIYUKI
分类号 H03K19/0185;H03K3/356;H03K19/00 主分类号 H03K19/0185
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