发明名称 PROCESS FOR FABRICATING A FIELD-EFFECT TRANSISTOR DEVICE IMPLEMENTED ON A NETWORK OF VERTICAL NANOWIRES, THE RESULTING TRANSISTOR DEVICE, AN ELECTRONIC DEVICE COMPRISING SUCH TRANSISTOR DEVICES AND A PROCESSOR COMPRISING AT LEAST ONE SUCH DEVICE
摘要 <p>A process for fabricating a field-effect transistor device (20) implemented on a network of vertical nanowires (24), includes: producing a source electrode (26) and a drain electrode (30) at each end of each nanowire (24) symmetrically relative to the gate electrode of each elementary transistor implemented on a nanowire; creating a gate electrode by depositing a layer (38) of conductive material around a layer (36) of dielectric material that surrounds a portion of each nanowire (24), a single conductive layer (38) being used for all of the nanowires and the thickness of the conductive layer corresponding to the gate length of the transistor device; and insulating each electrode with a planar layer (32, 34) of a dielectric material in order to form a nanoscale gate and in order to insulate the contacts of each elementary transistor between the gate and the source and the gate and the drain.</p>
申请公布号 EP2643848(A2) 申请公布日期 2013.10.02
申请号 EP20110790940 申请日期 2011.11.24
申请人 CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (C.N.R.S.) 发明人 LARRIEU, GUILHEM
分类号 H01L21/335;B82Y10/00;B82Y40/00;H01L21/8232;H01L29/06;H01L29/423;H01L29/739;H01L29/775 主分类号 H01L21/335
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