发明名称 |
Apparatus and method for converting static memory address to memory address pulse |
摘要 |
A tri-state NAND circuit includes a first input connected to receive a first input signal and a second input connected to receive a second input signal. The tri-state NAND circuit is connected to operate in accordance with a first clock signal and a second clock signal. A logic state of the second clock signal is opposite a logic state of the first clock signal. The tri-state NAND circuit is connected to transmit an output signal to a first node. A tri-state latch circuit is connected to hold a signal present at the first node in accordance with the first clock signal and the second clock signal. A pulse generating NAND circuit includes a first input connected to the first node and a second input connected to receive the first clock signal. The pulse generating NAND circuit is connected to transmit an output signal to a second node.
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申请公布号 |
US8547778(B2) |
申请公布日期 |
2013.10.01 |
申请号 |
US201113252945 |
申请日期 |
2011.10.04 |
申请人 |
SATHIANATHAN HARIKARAN;ORACLE INTERNATIONAL CORPORATION |
发明人 |
SATHIANATHAN HARIKARAN |
分类号 |
G11C8/00 |
主分类号 |
G11C8/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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