发明名称 Compact read only memory cell
摘要 A method of manufacturing a read only memory cell includes connecting electrically a drain of the transistor to the bit line with a first conductor and a via. The method also includes generating a logic zero at a source of the transistor by electrically connecting the source of the transistor to a ground line with the first conductor. Further, the method includes, programming the read only memory cell to logic zero. A method of manufacturing a read only memory cell includes connecting electrically a drain of the transistor to the bit line with a first conductor and a via. The method also includes, connecting electrically a source of the transistor to the drain with the first conductor. Further, the method includes programming the read only memory cell to logic one.
申请公布号 US8546251(B1) 申请公布日期 2013.10.01
申请号 US20080346866 申请日期 2008.12.31
申请人 SACHAN VINEET KUMAR;KHANUJA AMIT;SABHARWAL DEEPAK;SYNOPSYS, INC. 发明人 SACHAN VINEET KUMAR;KHANUJA AMIT;SABHARWAL DEEPAK
分类号 H01L21/3205;H01L21/4763 主分类号 H01L21/3205
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