发明名称 Method and apparatus of performing an erase operation on a memory integrated circuit
摘要 Various discussed approaches include an improved grouping of edge word lines and center word lines of an erase group during erase verify and erase sub-operations of an erase operation. In another approach, changed voltage levels of edge word lines to address the over-erase issue of the erase group, and also improve erase time performance. Another approach uses dummy word lines.
申请公布号 US8547755(B2) 申请公布日期 2013.10.01
申请号 US201213708102 申请日期 2012.12.07
申请人 CHANG YI-FAN;YIH CHENG MING;LO SU-CHUEH;LIU JIAN SHING;CHANG KUEN LONG;HUNG CHUN-HSIUNG;MACRONIX INTERNATIONAL CO., LTD. 发明人 CHANG YI-FAN;YIH CHENG MING;LO SU-CHUEH;LIU JIAN SHING;CHANG KUEN LONG;HUNG CHUN-HSIUNG
分类号 G11C16/04;G11C16/06 主分类号 G11C16/04
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