发明名称 |
Dispositivo de memoria para aplicaciones de memoria resistiva |
摘要 |
In a particular embodiment, a memory device is disclosed that includes a memory cell including a resistance-based memory element coupled to an access transistor. The access transistor has a first oxide thickness to enable operation of the memory cell at an operating voltage. The memory device also includes a first amplifier configured to couple the memory cell to a supply voltage that is greater than a voltage limit to generate a data signal based on a current through the memory cell. The first amplifier includes a clamp transistor that has a second oxide thickness that is greater than the first oxide thickness. The clamp transistor is configured to prevent the operating voltage at the memory cell from exceeding the voltage limit.
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申请公布号 |
ES2424222(T3) |
申请公布日期 |
2013.09.30 |
申请号 |
ES20090792136T |
申请日期 |
2009.09.01 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
DAVIERWALLA, ANOSH B.;ZHONG, CHENG;PARK, DONGKYU;ABU-RAHMA, MOHAMED HASSAN;SANI, MEHDI HAMIDI;YOON, SEI SEUNG |
分类号 |
G11C7/06;G11C7/10;G11C7/12;G11C7/14;G11C11/16 |
主分类号 |
G11C7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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