发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 A CRC code is generated from original data, a BCH code is generated based on the original data and CRC code; the original data, CRC code, and BCH code are recorded in pages from different planes of plural memory chips. An RS code is generated from the original data across pages, a CRC code is generated based on the RS code, a BCH code is generated based on the RS code and the CRC code; the RS, CRC, and BCH codes are recorded in a different memory chip than the original data. When reading data, error correction is performed on the original data using the BCH code, then CRC is calculated. If the number of errors is correctable by erasure correction using the RS code, the original data is so corrected. Otherwise, normal error correction using the RS code and further error correction using the BCH code are performed.
申请公布号 US2013254622(A1) 申请公布日期 2013.09.26
申请号 US201313858370 申请日期 2013.04.08
申请人 KABUSHIKI KAISHA TOSHIBA;KABUSHIKI KAISHA TOSHIBA 发明人 KANNO SHINICHI
分类号 H03M13/29 主分类号 H03M13/29
代理机构 代理人
主权项
地址