| 摘要 |
A semiconductor memory device includes strings configured to include a drain select transistor, memory cells, and a source select transistor coupled in series between a bit line and a common source line and peripheral circuits configured to precharge a bit line so that the precharge level of the bit line varies depending on whether an adjacent unselected memory cell is in the program or erase states, by supplying a first voltage to the adjacent unselected memory cell arranged toward the drain select transistor, a second voltage to the remaining memory cells, and a third voltage higher than a bit line precharge voltage to the common source line and perform a read operation of supplying a read voltage lower than the second voltage to the selected memory cell, the second voltage to the remaining memory cells including the adjacent unselected memory cell, and a ground voltage to the common source line.
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