| 摘要 |
PURPOSE: A content addressable memory system is characterized by a highly integrated circuit in which a priority encoder and a low decoder share a low address register. CONSTITUTION: A matched amplifier (3) amplifies the output of a matched line. A priority operation unit (4) outputs one first according to the predetermined operation when search data and memory data are matched. A priority encoder/low decoder unit (5) shares a low address register in multiple rows. A search line (SL) driver (6) drives a search line according to a search line driver control signal of a control circuit. A bit line (BL) driver/read sense amplifier (7) drives a bit line to record data on a ternary content addressable memory (TCAM) array mat. [Reference numerals] (2) TCAM array mat; (3) Matched amplifier; (4) Priority operation unit; (5) Priority encoder/low decoder unit; (6) SL driver; (7) BL driver/read sense amplifier; (8) Control circuit; (AA) SLDrv. control signal; (BB) SA, WD control signal; (CC) Match Amp control signal; (DD) Rescue address signal; (EE) Match address; (FF) READ/WRITE control signal |
