发明名称 |
TEST CIRCUIT, MEMORY SYSTEM AND TEST METHOD OF MEMORY SYSTEM |
摘要 |
This technology relates to smoothly performing a test on a memory circuit having a high memory capacity while reducing the size of a test circuit. A test circuit according to the present invention includes a test execution unit configured to perform a test on a target test memory circuit, an internal storage unit configured to store data for the test execution unit, and a conversion setting unit configured to set a part of or the entire storage space of the target test memory circuit as an external storage unit for storing the data for the test execution unit.
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申请公布号 |
KR20130104732(A) |
申请公布日期 |
2013.09.25 |
申请号 |
KR20120026508 |
申请日期 |
2012.03.15 |
申请人 |
SK HYNIX INC. |
发明人 |
YANG, HYUNG GYUN;LEE, HYUNG DONG;KWON, YONG KEE;MOON, YOUNG SUK;KIM, HONG SIK |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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