发明名称
摘要 <p>A semiconductor memory cell device includes a first multiplexer selecting a sub-block including a memory cell storing data to be read out in a row, a drain selector selecting a first column line connected to one terminal of the memory cell to be read, a precharge selector selecting a second column line connected to the other terminal of the memory cells adjacent to the one terminal of the memory cell storing the data to be readout, a second multiplexer selecting the sub-block including the second column line, a source selector selecting a third column line connected to the other terminal of the memory cell storing the data to be read out. The second multiplexer and precharge selector, when selecting, apply a first voltage to the second column line, and the source selector, when selecting, applies a second voltage to the third column line.</p>
申请公布号 JP5297673(B2) 申请公布日期 2013.09.25
申请号 JP20080080494 申请日期 2008.03.26
申请人 发明人
分类号 G11C16/06;G11C16/02;G11C16/04 主分类号 G11C16/06
代理机构 代理人
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