发明名称 NEGATIVE BITLINE WRITE ASSIST CIRCUIT AND METHOD FOR OPERATING THE SAME
摘要 A negative bitline write assist circuit includes a bias capacitor configured to facilitate driving the capacitance of a bitline. The negative bitline write assist circuit may be modularly replicated within a circuit to change the amount of negative voltage on the bitline during write operations. The bitline write assist circuit may be coupled directly to the bitline, removing the need to add a pull-down transistor to the write driver.
申请公布号 WO2013137888(A1) 申请公布日期 2013.09.19
申请号 WO2012US29286 申请日期 2012.03.15
申请人 INTEL CORPORATION;KOLAR, PRAMOD;RILEY, JOHN;PANDYA, GUNJAN 发明人 KOLAR, PRAMOD;RILEY, JOHN;PANDYA, GUNJAN
分类号 G11C7/12;G11C5/14;G11C7/10 主分类号 G11C7/12
代理机构 代理人
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