METHOD AND APPARATUS FOR PER CORE PERFORMANCE STATES
摘要
A method and apparatus for per core performance states in a processor. Per Core Performance States (PCPS) refer to the parallel operating of individual cores at different voltage and / frequency points. In one embodiment of the invention, the processor has a plurality of processing cores and a power control module that is coupled with each of the plurality of processing cores. The power control module facilitates each processing core to operate at a different performance state from the other processing cores. By allowing its cores to have per core performance state configuration, the processor is able to reduce its power consumption and increase its performance.
申请公布号
WO2013137865(A1)
申请公布日期
2013.09.19
申请号
WO2012US28923
申请日期
2012.03.13
申请人
INTEL CORPORATION;BHANDARU, MALINI;DEHAEMER, ERIC;HO, SAMUEL;BOBHOLZ, SCOTT;POIRIER, CHRIS
发明人
BHANDARU, MALINI;DEHAEMER, ERIC;HO, SAMUEL;BOBHOLZ, SCOTT;POIRIER, CHRIS