发明名称 Microprocessor that performs a two-pass breakpoint check for a cache line-crossing load/store operation
摘要 A microprocessor breakpoint-checks a load/store operation specifying a load/store virtual address of data whose first and second pieces are within first and second cache lines. A queue of entries each include first storage for an address associated with the operation and second storage for an indicator indicating whether there is a match between a page address portion of the virtual address and a page address portion of a breakpoint address. During a first pass through a load/store unit pipeline, the unit performs a first piece breakpoint check using the virtual address, populates the second storage indicator, and populates the first storage with a physical address translated from the virtual address. During the second pass, the unit performs a second piece breakpoint check using the indicator received from the second storage and an incremented version of a page offset portion of the load/store physical address received from the first storage.
申请公布号 US8539209(B2) 申请公布日期 2013.09.17
申请号 US20090607301 申请日期 2009.10.28
申请人 POGOR BRYAN WAYNE;EDDY COLIN;VIA TECHNOLOGIES, INC. 发明人 POGOR BRYAN WAYNE;EDDY COLIN
分类号 G06F9/312 主分类号 G06F9/312
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