发明名称 |
Correlation of device manufacturing defect data with device electrical test data |
摘要 |
Various embodiments related to correlating a location of a defect on a substrate for a semiconductor device to an electrical significance of a device structure at that location are disclosed. For example, one embodiment includes receiving a defect location for the location on the substrate where the defect was detected; receiving a physical representation of the semiconductor device for the defect location; generating a significance determination indicating whether the defect is located in an electrically significant region by correlating the defect location to logical and physical layout information included in the physical representation; and displaying the significance determination.
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申请公布号 |
US8539389(B2) |
申请公布日期 |
2013.09.17 |
申请号 |
US201113151018 |
申请日期 |
2011.06.01 |
申请人 |
AKAR ARMAGAN;SANCHEZ RALPH;TESEDA CORPORATION |
发明人 |
AKAR ARMAGAN;SANCHEZ RALPH |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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