发明名称 SCALABLE ELECTRICALLY ERASEABLE AND PROGRAMMABLE MEMORY
摘要 A non-volatile memory including one or more EEPROM cell pairs. Each EEPROM cell pair includes three transistors and stores two data bits, effectively providing a 1.5 transistor EEPROM cell. An EEPROM cell pair includes a first non-volatile memory transistor, a second non-volatile memory transistor and a source access transistor. The source access transistor includes: a first source region continuous with a source region of the first non-volatile memory transistor; a second source region continuous with a source region of the second non-volatile memory transistor, and a drain region that extends downward through a first well region to contact a second well region. The first, second and third semiconductor regions and the second well region have a first conductivity type, and the first well region has a second conductivity type, opposite the first conductivity type.
申请公布号 KR101309876(B1) 申请公布日期 2013.09.17
申请号 KR20097004647 申请日期 2007.09.04
申请人 发明人
分类号 G11C16/00;H01L27/115 主分类号 G11C16/00
代理机构 代理人
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