Asynchronous circuit e.g. demultiplexing circuit, has blocking circuit receiving derived signal in input and configured to prevent propagation of data output and acknowledgment signal when branch end signals are in different logical states

摘要

The circuit has a fork (F) with two branches (B0, B1), where each branch is connected to logic gates, so that the logic gates receive a branch end signal from terminals (X0, X1) in input. Derivation circuits (2a, 2b) derive the branch end signal at each logic gate to form derived signals (X0', X1'). A blocking circuit includes muller doors (G0, G1) and receives the derived signal in input. The blocking circuit is configured to prevent propagation of data output signals (S0, S1) and acknowledgment signal (Eack) when the branch end signals are in different logical states. An independent claim is also included for a method for reducing sensitivity to delays of an asynchronous circuit.