发明名称 |
PROCESSES FOR FORMING INTEGRATED CIRCUITS AND INTEGRATED CIRCUITS FORMED THEREBY |
摘要 |
Processes for forming integrated circuits and integrated circuits formed thereby are provided in which a first dielectric layer including a first dielectric material is formed on an underlying substrate. A first etch mask having at least two patterned recesses is patterned over the first dielectric layer. At least one first-level via is etched in the first dielectric layer through one patterned recess in the first etch mask with a first etchant, and the first-level via is filled with electrically-conductive material. A second dielectric layer including a second dielectric material is formed over the first dielectric layer. A second etch mask having patterned recesses corresponding to the patterned recesses of the first etch mask is patterned over the second dielectric layer. Second-level vias are etched in the second dielectric layer through the patterned recesses in the second etch mask with a second etchant and exposed to the first etchant. |
申请公布号 |
US2013234336(A1) |
申请公布日期 |
2013.09.12 |
申请号 |
US201213417491 |
申请日期 |
2012.03.12 |
申请人 |
RICHTER RALF;THEES HANS-JUERGEN;GLOBALFOUNDRIES INC. |
发明人 |
RICHTER RALF;THEES HANS-JUERGEN |
分类号 |
H01L23/48;H01L21/768 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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