发明名称 DELAY MEASURING CIRCUIT AND DELAY MEASURING METHOD
摘要 A delay measuring circuit includes a first trigger-signal generating unit that, when a value of a signal input to a circuit under test, changes, generates a first trigger signal. The delay measuring circuit includes a second trigger-signal generating unit that, when a value of a signal output from the circuit under test changes, generates a second trigger signal. The delay measuring circuit includes a delay unit that includes a plurality of delay elements connected in series. The delay measuring circuit includes a delay information retaining unit that individually captures and retains the first trigger signal output from each of the delay elements included in the delay unit between when the first trigger signal is generated by the first trigger-signal generating unit and when the second trigger signal is generated by the second trigger-signal generating unit.
申请公布号 US2013234770(A1) 申请公布日期 2013.09.12
申请号 US201313873508 申请日期 2013.04.30
申请人 FUJITSU LIMITED 发明人 YONEZAWA TAKAHIRO
分类号 H03H11/26 主分类号 H03H11/26
代理机构 代理人
主权项
地址