| 摘要 |
A semiconductor apparatus including an equalizing unit configured to equalize voltages of a bit line and a bit bar line in response to an equalization signal; a precharge circuit unit configured to supply a voltage to the bit line and the bit bar line in response to first and second precharge signals; and a control unit configured to receive the equalization signal, and generate the equalization signal as the first and second precharge signals according to a control signal. |
