发明名称 METHODS OF FORMING A PLURALITY OF CONDUCTIVE LINES IN THE FABRICATION OF INTEGRATED CIRCUITRY, METHODS OF FORMING AN ARRAY OF CONDUCTIVE LINES, AND INTEGRATED CIRCUITRY
摘要 A method of forming a pair of conductive lines in the fabrication of integrated circuitry includes forming a trench into a damascene material received over a substrate. Conductive material is deposited over the damascene material and to within the trench to overfill the trench. The conductive material is removed back at least to the damascene material to leave at least some of the conductive material remaining in the trench. Etching is conducted longitudinally through the conductive material within the trench to form first and second conductive lines within the trench which are mirror images of one another in lateral cross section along at least a majority of length of the first and second conductive lines. Other implementations are contemplated.
申请公布号 KR101307705(B1) 申请公布日期 2013.09.11
申请号 KR20117029064 申请日期 2010.04.09
申请人 发明人
分类号 H01L21/768;H01L21/8239 主分类号 H01L21/768
代理机构 代理人
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