发明名称 |
Controlled area solder bonding for dies |
摘要 |
A method of fabricating a semiconductor comprises forming a plurality of stud bumps in a pattern having a geometrical shape on a surface of a substrate, the pattern defining a periphery of a bonding area on the surface of the substrate, and placing a solder material in the bonding area such that the solder material is surrounded by the stud bumps. The solder material is heated to a temperature where the solder material begins to flow within the bonding area. A bonding surface of a die is pressed onto the stud bumps with a sufficient pressure to crush the stud bumps a predetermined extent such that the solder material substantially evenly spreads between the stud bumps within the bonding area. The solder material is then solidified to form a final solder area that conforms to the geometrical shape of the pattern of stud bumps.
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申请公布号 |
US8531040(B1) |
申请公布日期 |
2013.09.10 |
申请号 |
US201213419779 |
申请日期 |
2012.03.14 |
申请人 |
ESKRIDGE MARK;HONEYWELL INTERNATIONAL INC. |
发明人 |
ESKRIDGE MARK |
分类号 |
H01L23/48;H01L21/44;H01L23/52;H01L29/40 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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