发明名称 OSCILLATION CIRCUIT, INTEGRATED CIRCUIT AND ABNORMALITY DETECTION METHOD
摘要 PROBLEM TO BE SOLVED: To enable abnormality detection even when a sub-oscillation circuit stops and also achieve the miniaturization of an oscillation circuit itself .SOLUTION: In a period predetermined in accordance with the oscillation frequency of a sub-oscillation circuit 50, the lower limit value and upper limit value of the number of high speed clocks of a main oscillation circuit 30 are preliminarily stored in a lower limit value register 40 and an upper limit value register 44. In a first abnormality detection part 22, high speed clocks are counted by a counter 32 in a period corresponding to a high speed clock and a low speed clock, and the count value is compared with the upper limit value by a comparator 42, and when the count value exceeds the upper limit value, abnormality is detected, and the output value of a register 36 corresponding to the count value is compared with the lower limit value by a comparator 38, and when the output value is less than the lower limit value, abnormality is detected. In a second abnormality detection part 24, when the respective bits of the output value of a shift register 54 which has fetched a frequency-division clock obtained by frequency-dividing the high speed clock by a frequency-divider 52 in a timing corresponding to the low speed clock are all the same value, abnormality is detected by an oscillation confirmation circuit 56.
申请公布号 JP2013175056(A) 申请公布日期 2013.09.05
申请号 JP20120039270 申请日期 2012.02.24
申请人 LAPIS SEMICONDUCTOR CO LTD 发明人 YOSHIMURA KATSUTOSHI;INOUE KAZUTOSHI
分类号 G06F1/04;H03K5/19 主分类号 G06F1/04
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