发明名称 Processor, information processing apparatus, and arithmetic method
摘要 <p>A processor (12 to 12g) includes a cache memory (12a) that temporarily retains data stored in a main storage (17 to 24). The processor includes a processing unit (40 to 40b) that executes an application by using the data retained in the cache memory (12a), The processor includes a storing unit (12c, 12e, 42, 46) that stores therein update information indicating data that has been updated by the processing unit (40 to 40b) within the time period specified by the application executed by the processing unit (40 to 40b). The processor includes a write back unit (52) that, when the time period specified by the application ends, writes back, to the main storage (17 to 24) from the cache memory (12a), data that is from among the data retained in the cache memory (12a) and that is indicated by the update information stored in the storing unit (12c, 12e, 42, 46).</p>
申请公布号 EP2634702(A1) 申请公布日期 2013.09.04
申请号 EP20120194012 申请日期 2012.11.23
申请人 FUJITSU LIMITED 发明人 UEKI, TOSHIKAZU;OKADA, SEISHI;KOINUMA, HIDEYUKI;SUGIZAKI, GO
分类号 G06F12/08 主分类号 G06F12/08
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