发明名称 MULTI-CHANNEL SAMPLE AND HOLD CIRCUIT AND ANALOG TO DIGITAL CONVERTER THEREOF
摘要 A sample-and-hold circuit connected to an analog-to-digital converter (ADC) is provided. The sample-and-hold circuit includes an operational amplifier configured to output a result signal to the ADC; a feedback capacitor connected between an input terminal and an output terminal of the operational amplifier to form a feedback path; a plurality of sampling capacitor blocks each connected to one of a plurality of channels. The plurality of sampling capacitor blocks configured to sample and hold an analog signal input to each of the channels; a plurality of controllers each connected between one of the sampling capacitor blocks and the operational amplifier. The plurality of controllers configured to switch the sampled signal so that held signals for the respective channels are sequentially input to the operational amplifier; and a reset unit connected between a reference voltage source and the input terminal of the operational amplifier to reset the operational amplifier when the operational amplifier does not perform a holding operation.
申请公布号 KR20130097989(A) 申请公布日期 2013.09.04
申请号 KR20120019739 申请日期 2012.02.27
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, KYUNG HOON;CHOI MICHAEL;SHIN, EUN SEOK
分类号 H03M1/12 主分类号 H03M1/12
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