发明名称 Clustered stacked vias for reliable electronic substrates
摘要 A method of fabricating a substrate via structure in a substrate/chip assembly includes steps of: disposing a center via stack for electrical interconnects in the substrate/chip assembly; and providing a plurality of stacked vias surrounding the center via stack. The plurality of stacked vias encircle the center via stack, resulting in no isolated via stacks on the structure. The plurality of stacked vias have both functional and non-functional vias.
申请公布号 US8522430(B2) 申请公布日期 2013.09.03
申请号 US201213549440 申请日期 2012.07.14
申请人 KACKER KARAN;POWELL DOUGLAS O.;QUESTAD DAVID L.;RUSSELL DAVID J.;SRI-JAYANTHA SRI M.;INTERNATIONAL BUSINESS MACINES CORPORATION 发明人 KACKER KARAN;POWELL DOUGLAS O.;QUESTAD DAVID L.;RUSSELL DAVID J.;SRI-JAYANTHA SRI M.
分类号 H05K3/40;H01L21/768;H01L23/48 主分类号 H05K3/40
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