发明名称 |
Communication systems and clock generation circuits thereof with reference source switching |
摘要 |
A clock generation circuit for a transmitter which transmits data according to an output clock signal is provided. The clock generation circuit include a clock generator and a phase locked loop (PLL). The clock generator generates a first clock signal. The PLL initially generates the output clock signal according to the first clock signal. When a frequency of the output clock signal generated according to the first clock signal is not within a range required for specification of the transmitter, the PLL generates the output clock signal according to a second clock signal.
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申请公布号 |
US8526559(B2) |
申请公布日期 |
2013.09.03 |
申请号 |
US20090410502 |
申请日期 |
2009.03.25 |
申请人 |
CHAO KUAN-HUA;LIU SHIUE-SHIN;HSU TSE-HSIANG;MEDIATEK INC. |
发明人 |
CHAO KUAN-HUA;LIU SHIUE-SHIN;HSU TSE-HSIANG |
分类号 |
H03D3/24 |
主分类号 |
H03D3/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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