发明名称 Echo cancellation circuit
摘要 An echo cancellation circuit in a full duplex two-way communication system comprising: an input/output terminal; a subtractor having a positive and a negative input terminals, in which a first transmission signal is inputted to the negative input terminal as a pseudo echo signal, the first transmission signal is inputted through an output buffer to the positive input terminal as an echo signal, the pseudo echo signal inputted to the negative input terminal is subtracted from the echo signal inputted to the positive input terminal; and a result of the subtraction is outputted; and an echo cancellation error reducing unit having a D/A converter at an input side or an output side of the subtractor.
申请公布号 US8526339(B2) 申请公布日期 2013.09.03
申请号 US201113044346 申请日期 2011.03.09
申请人 NAKATSUKA SHINJI;ODA KAZUHIRO;KABUSHIKI KAISHA TOSHIBA 发明人 NAKATSUKA SHINJI;ODA KAZUHIRO
分类号 H04B3/20 主分类号 H04B3/20
代理机构 代理人
主权项
地址