发明名称 Method for reducing Fermi-Level-Pinning in a non-silicon channel MOS device
摘要 A method to reduce (avoid) Fermi Level Pinning (FLP) in high mobility semiconductor compound channel such as Ge and III-V compounds (e.g. GaAs or InGaAs) in a Metal Oxide Semiconductor (MOS) device. The method is using atomic hydrogen which passivates the interface of the high mobility semiconductor compound with the gate dielectric and further repairs defects. The methods further improve the MOS device characteristics such that a MOS device with a quantum well is created.
申请公布号 US8524562(B2) 申请公布日期 2013.09.03
申请号 US20090560282 申请日期 2009.09.15
申请人 WANG WEI-E;LIN HAN CHUNG;MEURIS MARC;IMEC 发明人 WANG WEI-E;LIN HAN CHUNG;MEURIS MARC
分类号 H01L21/336 主分类号 H01L21/336
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