发明名称 POWER SUPPLY MONITORING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a power supply monitoring circuit normally outputting a reset signal despite an order of a fall and a fall time of a power-supply voltage.SOLUTION: A reference current generating circuit 2a and a reset signal output circuit 5a of a power supply monitoring circuit 1a are connected to a VCC via a diode D1, connected to a VREGD that is a power supply for a microcomputer formed by stepping down the VCC, via a diode D2, and are operated by a power-supply voltage having a higher voltage. When the VREGD voltage is higher than a detection voltage, a reset release circuit 3 outputs a reset release current and, when the reset release current is lower than the reference current of the reference current generating circuit 2a, the reset signal output circuit 5a outputs a reset signal of 0 V to reset the operation of the microcomputer.
申请公布号 JP2013171507(A) 申请公布日期 2013.09.02
申请号 JP20120036321 申请日期 2012.02.22
申请人 AZBIL CORP 发明人 TAKAMIYA TOMOHIRO;HATANAKA HIROSHI;SATO NAGAYUKI;KAJITA TETSUYA;KATO TAICHIRO
分类号 G06F1/24;G06F1/30;H02J1/00 主分类号 G06F1/24
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