| 摘要 |
<p>The generator has a clock input (CK) to receive a clock signal and a clock output (CP) to provide pulses on the clock input from a storage register. Another clock input (SETH) receives a forcing signal from the clock output, independent to the clock signal, for permitting transparency of the register. A third clock input receives the forcing signal from the clock output, independent to the clock signal, for blocking states of the output from the register. A grid of a P-type metal oxide semiconductor transistor is connected to the input (CK). Independent claims are also included for the following: (1) a synchronous integrated circuit comprising a set of registers (2) a method for achieving a functional test of the integrated circuit.</p> |
