| 摘要 |
Provided is a semiconductor device having a vertical MOS transistor and a method of manufacturing the same. The vertical MOS transistor has a trench gate, a distance between a gate electrode and an N-type high concentration buried layer below the gate electrode is formed longer than that in the conventional structure, and a P-type trench bottom surface lower region (5) is formed therebetween. In this manner, when a high voltage is applied to a drain region and 0 V is applied to the gate electrode, the trench bottom surface lower region (5) is depleted, thereby increasing the breakdown voltage in the OFF state. |
