发明名称 INTEGRATED CIRCUIT AND TESTING METHOD
摘要 <p>An oscillation detecting circuit (15) of a JTAG-LSI (10) is provided between an input pin (11), through which the oscillating signal of an oscillator (20) is input, and a boundary register cell (12). The oscillation detecting circuit (15) makes a control such that a signal output from the oscillator (20) is received through the input pin (11), the frequency of the signal is counted, and a value of "1" is stored in the boundary register cell (12) when the frequency is equal to or more than the counter upper limit. Herein, in a case where the value stored in the boundary register cell (12) is "1", it is possible to determine that the wiring paths between the oscillator (20) and the JTAG-LSI (10) is appropriate.</p>
申请公布号 EP2631662(A1) 申请公布日期 2013.08.28
申请号 EP20100858619 申请日期 2010.10.19
申请人 FUJITSU LIMITED 发明人 OKAMOTO, HIROSHI
分类号 G01R31/28;G01R31/3185;G01R31/319;H03K5/19 主分类号 G01R31/28
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