发明名称 EXCEPTION CONTROL IN A MULTIPROCESSOR SYSTEM
摘要 A data processing apparatus is provided with a plurality of processing units (4 to 18; 32 to 38) executing respective streams of program instructions corresponding to respective processing threads. Exception control circuitry 20, 42 controls exception processing for a group of the processing unit in response to an exception triggering event. Each of the processing units moves only once and in sequence between normal, in-exception and done-exception states in response to a given exception event. A group of processing units moves in sequence between states normal, triggering and completing in response to the exception event. A counter value is used to track the number of processing units which have entered exception processing and then to track the number of processing units which have completed their exception processing.
申请公布号 EP2630577(A1) 申请公布日期 2013.08.28
申请号 EP20110752623 申请日期 2011.08.24
申请人 ARM LIMITED 发明人 JONES, SIMON;TAPPLY, JOE DOMINIC MICHAEL
分类号 G06F13/24;G06F15/16 主分类号 G06F13/24
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