发明名称
摘要 The present invention provides a method for manufacturing a semiconductor device. In the method, a connection hole such as a via hole is formed in an interlayer insulating film by plasma etching with high etching uniformity regardless of the array density of connection holes. In the method, an upper layer film having a mask pattern is formed on the interlayer insulating film present on a substrate. A gas required for dehydration is then supplied to the substrate under the condition that an upper surface of the interlayer insulating film is exposed in order to remove moisture from the interlayer insulating film. A portion of the interlayer insulating film is etched to form a connection hole in which an electrical connection portion is to be embedded.
申请公布号 JP5272336(B2) 申请公布日期 2013.08.28
申请号 JP20070164170 申请日期 2007.06.21
申请人 发明人
分类号 H01L21/3065;H01L21/768 主分类号 H01L21/3065
代理机构 代理人
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