发明名称 |
Semiconductor modules and signal line layout methods thereof |
摘要 |
A memory module and a layout method of the memory module. The memory module includes memory devices connected to corresponding tabs through corresponding damping resistors formed on a printed circuit board and includes a first signal line group in a first region between the memory devices and the damping resistors and a second signal line group in a second region between the corresponding damping resistors and the connecting terminals.
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申请公布号 |
US8520422(B2) |
申请公布日期 |
2013.08.27 |
申请号 |
US20100662844 |
申请日期 |
2010.05.06 |
申请人 |
SEOK JONG-HYUN;KIM DOHYUNG;KIM JONGHOON;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SEOK JONG-HYUN;KIM DOHYUNG;KIM JONGHOON |
分类号 |
G11C5/02 |
主分类号 |
G11C5/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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