发明名称 3D semiconductor package interposer with die cavity
摘要 A 3D semiconductor package using an interposer is provided. In an embodiment, an interposer is provided having a first die electrically coupled to a first side of the interposer and a second die electrically coupled to a second side of the interposer. The interposer is electrically coupled to an underlying substrate, such as a packaging substrate, a high-density interconnect, a printed circuit board, or the like. The substrate has a cavity such that the second die is positioned within the cavity. The use of a cavity may allow smaller conductive bumps to be used, thereby allowing a higher number of conductive bumps to be used. A heat sink may be placed within the cavity to aid in the dissipation of the heat from the second die.
申请公布号 US8519537(B2) 申请公布日期 2013.08.27
申请号 US20100813212 申请日期 2010.06.10
申请人 JENG SHIN-PUU;CHEN KIM HONG;HOU SHANG-YUN;SHIH CHAO-WEN;HSIEH CHENG-CHIEH;YU CHEN-HUA;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 JENG SHIN-PUU;CHEN KIM HONG;HOU SHANG-YUN;SHIH CHAO-WEN;HSIEH CHENG-CHIEH;YU CHEN-HUA
分类号 H01L23/13;H01L23/488;H01L23/538 主分类号 H01L23/13
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