发明名称 |
MAGNETORESISTIVE LOGIC CELL AND METHOD OF USE |
摘要 |
A magnetoresistive logic cell (MRLC) is described that includes two MTJs in series that share a common free layer (CFL). The relative magnetization orientations of the CFL and the switchable reference layer (SRL) in MTJ-1 dominate the overall resistance of the MRLC without regard to the fixed magnetization orientation of the nonswitchable reference layer in MTJ-2. High and low resistance states of the MRLC occurs based on the relative magnetization orientations of SRL and CFL. This behavior allows the MRLC to be used as a logical comparator. The CFL is switched by STT effect by application of selected relatively short voltage pulses that do not switch the SRL. A voltage-induced switching principle can be used with MRLC embodiments of the present invention to switch the SRL to parallel or anti-parallel with respect to the magnetization CFL in both perpendicular and in-plane anisotropy embodiments.
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申请公布号 |
US2013215673(A1) |
申请公布日期 |
2013.08.22 |
申请号 |
US201313774801 |
申请日期 |
2013.02.22 |
申请人 |
AVALANCHE TECHNOLOGY INC.;AVALANCHE TECHNOLOGY INC. |
发明人 |
ZHOU YUCHEN;WANG ZIHUI;HUAI YIMING |
分类号 |
G11C11/16 |
主分类号 |
G11C11/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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