发明名称 MEMORY BIT REPAIR SCHEME
摘要 <p>A memory device for providing memory bit repair. The memory device may include memory cells. Each of the memory cells may include a measurable characteristic that identifies a stored data value (342, 344). At least one of the memory cells may have a measurable characteristic set to a defective bit state (340). A defective bit state may refer to a measurable characteristic (334) set to be outside of a working measurable characteristic range (332). The defective bit state may enable memory bit repair by identifying the at least one memory cell as being defective.</p>
申请公布号 WO2013123437(A1) 申请公布日期 2013.08.22
申请号 WO2013US26500 申请日期 2013.02.15
申请人 QUALCOMM INCORPORATED 发明人 HSU, WAH NAM
分类号 G11C13/00;G11C11/16;G11C29/00 主分类号 G11C13/00
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