发明名称 MEMORY CIRCUIT AND FIELD PROGRAMMABLE GATE ARRAY
摘要 A memory circuit according to an embodiment includes: a plurality of memory cells each having one pair of first and second nonvolatile memory circuits, each of the first and second nonvolatile memory circuits in each memory cell being capable of making a transition between a high resistance state and a low resistance state, and in a state in which one memory cell in the plurality of memory cells has information stored therein, one of the first and second nonvolatile memory circuits in the one memory cell being in a high resistance state whereas the other being in a low resistance state.
申请公布号 US2013215670(A1) 申请公布日期 2013.08.22
申请号 US201213719775 申请日期 2012.12.19
申请人 ODA MASATO;ZAITSU KOICHIRO;SAKUMA KIWAMU;YASUDA SHINICHI;OIKAWA KOHEI 发明人 ODA MASATO;ZAITSU KOICHIRO;SAKUMA KIWAMU;YASUDA SHINICHI;OIKAWA KOHEI
分类号 G11C11/40 主分类号 G11C11/40
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