发明名称 MEMORY BIT REPAIR SCHEME
摘要 A memory device for providing memory bit repair. The memory device may include memory cells. Each of the memory cells may include a measurable characteristic that identifies a stored data value. At least one of the memory cells may have a measurable characteristic set to a defective bit state. A defective bit state may refer to a measurable characteristic set to be outside of a working measureable characteristic range. The defective bit state may enable memory bit repair by identifying the at least one memory cell as being defective.
申请公布号 US2013215671(A1) 申请公布日期 2013.08.22
申请号 US201213398238 申请日期 2012.02.16
申请人 HSU WAH NAM;QUALCOMM INCORPORATED 发明人 HSU WAH NAM
分类号 G11C29/04;G11C11/00 主分类号 G11C29/04
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