发明名称
摘要 In a semiconductor memory device using a variable resistive element made of a metal oxide for storing information, a voltage amplitude of a writing voltage pulse for changing the variable resistive element to a high resistance state is set within a voltage range in which the resistance value of the high resistance state after the change increases with time. The voltage amplitude is set within the voltage range in which the resistance value of the high resistance state after the change increases toward a predetermined peak with increase in voltage amplitude. When a data error is detected by the ECC circuit, it is estimated that the data that should be in the low resistance state changes to the high resistance state, and the variable resistive elements of all memory cells from which the error is detected are written to the low resistance state to correct the error bit.
申请公布号 JP5269151(B2) 申请公布日期 2013.08.21
申请号 JP20110128954 申请日期 2011.06.09
申请人 发明人
分类号 G11C29/42;G06F12/16;G11C13/00 主分类号 G11C29/42
代理机构 代理人
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