发明名称 Methods, systems, and articles of manufacture for implementing constraint checking windows for an electronic design for multiple-patterning lithography processes
摘要 Disclosed are method(s), system(s), and article(s) of manufacture for implementing a layout of an electronic circuit using one or more constraint checking windows. The method identifies some constraints on multiple-patterning lithography and multiple constraint checking windows for the layout. The method determines one or more metrics for a constraint checking window or for a layout and assigns one or more shapes in the one or more constraint checking windows to their respective mask designs based on the one or more metrics. The method traverses through the one or more constraint checking windows until all shapes in the layout are assigned to their respective mask designs. The method may also determine a processing order for the one or more constraint checking windows based on the distribution of a type of shapes in the layout.
申请公布号 US8516404(B1) 申请公布日期 2013.08.20
申请号 US201113341849 申请日期 2011.12.30
申请人 CAO MIN;RUEHL ROLAND;LAMANT GILLES S. C.;CADENCE DESIGN SYSTEMS, INC. 发明人 CAO MIN;RUEHL ROLAND;LAMANT GILLES S. C.
分类号 G06F17/50 主分类号 G06F17/50
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