发明名称 Method for forming a dual damascene interconnect structure
摘要 An improved method of forming a semiconductor device including an interconnect layer formed using multilayer hard mask comprising metal mask and dielectric mask is provided. To form the second opening pattern being aligned to the first pattern, after the multilayer hard mask is used at the first step, then the dielectric mask is used to form a damascene structure in an insulator layer at the second step followed by removing the metal mask.
申请公布号 US8513114(B2) 申请公布日期 2013.08.20
申请号 US201213424954 申请日期 2012.03.20
申请人 TAGAMI MASAYOSHI;RENESAS ELECTRONICS CORPORATION 发明人 TAGAMI MASAYOSHI
分类号 H01L21/4763 主分类号 H01L21/4763
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