发明名称 FORWARD PROGRESS MECHANISM FOR STORES IN THE PRESENCE OF LOAD CONTENTION IN A SYSTEM FAVORING LOADS
摘要 <p>A multiprocessor data processing system includes a plurality of cache memories including a cache memory. In response to the cache memory detecting a storage-modifying operation specifying a same target address as that of a first read-type operation being processed by the cache memory, the cachememory provides a retry response to the storage-modifying operation. In response to completion of the read-type operation, the cache memory enters a referee mode. While in the referee mode, the cache memory temporarily dynamically increases priority of any storage-modifying operation targeting the target address in relation to any second read-type operation targeting the target address.</p>
申请公布号 WO2013118010(A1) 申请公布日期 2013.08.15
申请号 WO2013IB50573 申请日期 2013.01.23
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;IBM UNITED KINGDOM LIMITED;IBM (CHINA) INVESTMENT COMPANY LIMITED 发明人 WILLIAMS, DEREK, EDWARD;GUTHRIE, GUY, LYNN;LE, HIEN, MINH;STUECHELI, JEFFREY
分类号 G06F15/167 主分类号 G06F15/167
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